Axelera AI
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About
Axelera AI provides a specialized hardware and software platform designed to accelerate computer vision and generative AI inference at the edge. The core of their offering is the Metis AI Processing Unit (AIPU), which delivers high throughput starting at 214 TOPs and exceptional energy efficiency. By utilizing Digital In-Memory Computing (DIMC) technology, the hardware minimizes the energy-intensive movement of data, allowing for complex neural network processing in power-constrained environments without the high cost and thermal overhead of traditional GPUs. The ecosystem is supported by the Voyager SDK, a comprehensive software stack that simplifies the deployment of deep neural networks. It provides access to over 100 pre-trained models and allows users to run multiple streams—such as 16 simultaneous YOLO V5 streams—on a single chip. This seamless integration between hardware and software enables developers to transition from cloud-based development to edge-based deployment with minimal friction, ensuring accuracy and high performance across various computer vision applications. This technology is ideal for industries requiring real-time data processing and low latency, such as security, industrial automation, and smart cities. Systems designers and AI engineers in sectors like robotics, healthcare, and retail can leverage Axelera AI's evaluation kits and plug-and-play PCIe or M.2 cards to integrate advanced intelligence into their existing infrastructure. It is particularly beneficial for those looking to scale video analytics or complex monitoring systems where cloud connectivity is unreliable or too expensive. What sets Axelera AI apart is its focus on sovereign technology and extreme efficiency. Unlike general-purpose GPUs, the Metis and Europa architectures are purpose-built for AI inference, delivering up to 200 TOPs per chip at a fraction of the power consumption. This specialized focus, combined with long-term availability and partnerships with major vendors like Dell and Advantech, makes it a robust alternative for enterprises needing reliable, high-density AI compute at the edge.
Pros & Cons
Delivers up to 214 TOPs of performance on a single chip for high-speed inference.
Provides a significant reduction in power consumption and cost compared to GPU solutions.
Supports over 100 neural network models through the comprehensive Voyager SDK software.
Available in standard M.2 and PCIe form factors for easy integration into existing systems.
Capable of processing 16 simultaneous video streams on a single chip.
Requires physical hardware installation and compatible host system infrastructure.
The M.2 MAX AI Inference card is currently listed as coming soon and not yet available.
Optimization for specific models may be required to achieve maximum advertised performance.
Use Cases
Security system integrators can deploy real-time license plate recognition across dozens of camera streams using a single PCIe accelerator.
Industrial manufacturers can implement high-speed quality inspection on production lines using the Metis compute board for low-latency defect detection.
Smart city planners can manage traffic flow and pedestrian safety by processing multiple sensor feeds at the edge with evaluation systems.
Healthcare technology providers can integrate Metis M.2 cards into medical imaging devices to provide real-time diagnostic assistance without cloud dependency.
Platform
Features
• evaluation systems (dell/lenovo/advantech)
• multi-channel video analytics
• 100+ pre-trained models
• m.2 & pcie form factors
• digital in-memory computing (dimc)
• voyager sdk
• europa aipu (629+ tops)
• metis aipu (214+ tops)
FAQs
What models does the Voyager SDK support?
The Voyager SDK supports over 100 different neural network models, including popular options like YOLO V5 for object detection. It is designed to streamline the process of deploying these models directly onto Axelera hardware.
How does the performance compare to a traditional GPU?
Metis AIPUs provide performance starting at 214 TOPs with significantly lower power consumption and cost than standard GPUs. This makes them more efficient for dedicated edge inference tasks.
What form factors are the accelerators available in?
The hardware is available in multiple industry-standard form factors, including M.2 Edge accelerator cards and PCIe cards powered by single or quad-core AIPUs. Evaluation systems with partners like Dell and Lenovo are also available.
Can the hardware handle multiple video streams simultaneously?
Yes, a single Metis AIPU chip is capable of running 16 simultaneous YOLO V5 video streams. This capability is ideal for high-density multi-channel video analytics in security or retail environments.
Pricing Plans
Hardware Procurement
Unknown Price• Metis AIPU Hardware
• Voyager SDK Access
• 100+ Pre-trained Models
• Multi-stream Inference Support
• Edge AI Deployment Tools
• M.2 or PCIe Form Factors
Job Opportunities
Senior/Staff DFT Engineer
Deploy high-performance AI inference at the edge with energy-efficient AIPUs and a comprehensive SDK, offering superior power-to-performance over traditional GPUs.
Benefits:
pension plan
extensive employee insurances
option to get company shares
Experience Requirements:
minimum of 5 years in DFT engineering
Other Requirements:
SystemVerilog RTL
TCL
Python
Unix/Linux workflows
Responsibilities:
Implement scan insertion, ATPG, Memory BIST, JTAG/IJTAG
Collaborate with RTL, verification, and physical design teams
Support silicon bring-up and debug
Contribute to methodology improvements
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Processor Verification Engineer (all seniority levels)
Deploy high-performance AI inference at the edge with energy-efficient AIPUs and a comprehensive SDK, offering superior power-to-performance over traditional GPUs.
Benefits:
pension plan
extensive employee insurances
option to get company shares
Education Requirements:
degree in electronics engineering, electrical engineering or computer science
Experience Requirements:
minimum of 5 years of experience in ASIC or FPGA verification
Other Requirements:
SystemVerilog
C/C++
Python
instruction set simulators
Responsibilities:
Develop and execute verification plans for Processor units
Design and implement constrained random testbenches
Collaborate with architecture, RTL design, and compiler teams
Perform functional, performance, and stress testing
Develop and maintain test scripts and automation tools
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Senior/Staff Silicon Physical Design Engineer
Deploy high-performance AI inference at the edge with energy-efficient AIPUs and a comprehensive SDK, offering superior power-to-performance over traditional GPUs.
Benefits:
pension plan
extensive employee insurances
option to get company shares
Experience Requirements:
10+ years of experience in Physical Design (RTL to GDS)
Other Requirements:
Primetime
StarRC
Genus
Innovus
Design Compiler
Responsibilities:
Perform synthesis, floorplanning, place and route
Constraint generation, timing analysis and optimization
Execute clock tree synthesis (CTS)
Integrate IPs including memories, I/Os, and processors
Develop automation scripts in Python, Tcl, Bash
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