Benefits:

• Be at the forefront in cutting edge, low power semiconductor development

• Work in a collaborative, dynamic, and flexible startup culture

• Great opportunities for professional growth and career advancement

Education Requirements:

• BS / MS in Electrical or Computer Engineering or equivalent

Experience Requirements:

• 7+ years of experience

Other Requirements:

• Proven experience completing design cycles on delivered SRAM designs

• Skill in bitcell stability analysis

• Good understanding of high-performance and low power circuit designs with FinFet technologies

• Proven experience as the designated responsible individual for a memory design, leading a small team of designers

• Proficiency in scripting language: Python, Tcl

• Experience in <22nm CMOS processes

• Experience in Synopsys custom compiler

• Independent, self-motivated, well-structured, creative

• Good communication skills in English

Responsibilities:

• Lead end to end design team for high-performance, low-power embedded SRAMs on advanced technologies

• Memory compiler development, characterization, and verification

Benefits:

• Be at the forefront of cutting-edge semiconductor technology development

• Work in a collaborative, innovative, and dynamic startup culture

• Opportunity for professional growth and career advancement

• Competitive compensation package and benefits

Experience Requirements:

• 7+ years of experience

Other Requirements:

• Experience in team management

• Experience in development planning

• Experience in embedded systems or compiler design

• Experience in embedded systems/Linux/Windows driver design

• Experience with high-performance computing, e.g. DirectML/OpenCL

• Knowledge of Deep Learning

• Knowledge of Tensorflow/Pytorch

Responsibilities:

• Lead part of the software engineering team

• Plan the development of our software

• Design and supervise the implementation of drivers for embedded systems

• Design and supervise the implementation of model compilers

• Design and supervise the implementation of software API

Education Requirements:

• electronic engineering, computer science, AI, or mathematics or related fields

Other Requirements:

• Familiarity with programming languages like C and C++, Python

• Knowledge and experience with RISC-V processor architecture and SystemVerilog/UVM is preferable

Responsibilities:

• Design a customizable and extendable SystemVerilog UVM-based model of a RISC-V processor, along with the development of a UVM testbench environment to ensure comprehensive integration and functionality

• Ensure the model can support the verification of CV32E20

• Ensure the model can support custom ISA instructions

• Identify and overcome challenges associated with interrupt handling within the RISC-V core

• Integrate the developed SystemVerilog model into an RTL simulator environment