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Synthara

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About

Synthara is a semiconductor technology provider based in Zurich that specializes in unleashing the potential of in-memory computing (IMC) for the embedded systems market. Its flagship product, ComputeRAM™, is designed to overcome the traditional von Neumann bottleneck where data must constantly travel between a memory unit and a processing unit. By performing computations directly within the memory itself, Synthara enables a dramatic shift in how embedded chips handle data-intensive tasks, particularly those involving artificial intelligence and complex sensor processing. The technology works by integrating seamlessly into standard embedded chip designs, effectively turning storage components into active processing units. This architecture results in a performance boost of up to 100x in terms of both speed and energy efficiency. Because the integration is handled at the silicon level without requiring massive overhauls of existing software stacks or adding significant silicon area, it provides a low-friction path for chipmakers to enhance their hardware's AI capabilities. The platform is built to be flexible and reliable, catering to a wide range of power-constrained environments. Synthara is ideally suited for manufacturers and designers in the wearables, robotics, and smart sensor industries. In wearables, the technology allows for sophisticated features like on-device voice assistants and health monitoring without sacrificing battery life. In robotics and drones, it provides the computational headroom needed for autonomous navigation and real-time decision-making. The company also works closely with automotive semiconductor designers to advance high-performance computing within vehicles, ensuring that modern cars can handle the influx of data from various sensors and safety systems. What distinguishes Synthara from other hardware acceleration solutions is its focus on "seamless integration" and its collaborative ecosystem. While many AI accelerators require proprietary tools and complex integration steps, Synthara’s approach allows device makers to unlock new processing opportunities without excessive added costs. Through partnerships with industry leaders like Synopsys and Siemens, the company has validated its technology for diverse use cases ranging from low-power smart sensors to large-scale AI accelerators for Large Language Models (LLMs).

Pros & Cons

Delivers a 100x boost in energy efficiency and speed for embedded chips.

Eliminates data bottlenecks by performing computation directly within memory units.

Integrates into existing designs without requiring additional silicon or software costs.

Supported by a strong ecosystem of partners including Synopsys, Siemens, and Intel.

Versatile enough to be used in everything from hearing aids to automotive semiconductors.

Requires hardware-level integration which is not suitable for software-only developers.

Pricing is not publicly listed and requires direct contact for custom quotes.

Use Cases

Wearable device manufacturers can use ComputeRAM™ to add advanced voice assistants to hearing aids while maintaining long battery life.

Robotics engineers can integrate the technology into drones to enable faster real-time autonomous decision-making and sensing.

Automotive semiconductor designers can partner with Synthara to create high-performance, energy-efficient chips for next-generation vehicle systems.

Smart sensor developers can deploy programmable sensors that are adaptable to various industrial use cases without excessive power draw.

AI hardware researchers can utilize ComputeRAM™ as a case study for accelerating Large Language Models (LLMs) in edge environments.

Platform
Web
Task
embedded chip enhancement

Features

flexible hardware architecture

programmable smart sensors

embedded ai acceleration

seamless chip integration

energy efficiency optimization

100x speed improvement

in-memory computing (imc)

computeram™ technology

FAQs

What is ComputeRAM™?

ComputeRAM™ is Synthara's core technology that enables in-memory computing (IMC) for embedded chips. It eliminates the bottleneck between memory and compute units by performing calculations directly within the memory.

How much of a performance boost can I expect?

The technology delivers a 100x boost to both processing speed and energy efficiency. This is achieved by reducing the energy and time lost when moving data between storage and processors.

Does this require a complete software overhaul?

No, the technology is designed for seamless integration. It allows chip and device makers to unlock new capabilities without added software costs or significant changes to their existing silicon architecture.

Which industries can benefit from Synthara's technology?

The primary applications include wearables (hearing aids, fitness watches), robotics (drones, home automation), and programmable smart sensors. It is also used in automotive semiconductor design.

Pricing Plans

Enterprise / Custom
Unknown Price

ComputeRAM™ integration

100x boost to speed and efficiency

Seamless silicon integration

Support for wearables and robotics

Automotive semiconductor design

Access to IMC ecosystem

Technical support and documentation

Job Opportunities

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Synthara

Senior Compiler Engineer

Boost speed and energy efficiency by 100x for embedded chips using in-memory computing technology that eliminates data bottlenecks in AI-driven applications.

engineeringonsiteZurich, CHfull-time

Experience Requirements:

  • 5+ years building low-level software or compilers

  • Strong C++ and Python

  • Hands-on experience with embedded systems and compiler design

  • Solid systems understanding: memory and concurrency fundamentals

  • Evidence of performance work (profiling, tracing, optimization) on embedded or accelerator targets

Other Requirements:

  • Comfortable reading hardware datasheets and working at the HW/SW boundary

  • Clear writing, good documentation habits, and a collaborative approach

Responsibilities:

  • Design and implement embedded software libraries and low-level runtime

  • Develop and maintain the compiler path (MLIR/LLVM passes, code generation, kernels)

  • Develop and refine a benchmarking and profiling framework

  • Strengthen build, test, and CI so releases are predictable

  • Collaborate with hardware, architecture, and customer-facing teams

Show more details

Lead Software Engineer

Boost speed and energy efficiency by 100x for embedded chips using in-memory computing technology that eliminates data bottlenecks in AI-driven applications.

Experience Requirements:

  • 7+ years building low-level software or compilers

  • Strong C++ and Python

  • A track record of shipping complete projects end-to-end

  • Experience with roadmaps and reviews

  • Hands-on with MLIR/LLVM passes, code generation, graph compilers, or high-performance DSP libraries

Other Requirements:

  • Ability to lead independently and produce complete development plans (Jira, MS Project)

  • Ability to deal with hardware-specific language and define clean APIs

Responsibilities:

  • Own software development from a management perspective and distribute workload

  • Ensure correct exchange of information between hardware and software teams

  • Deliver clean programming models, drivers, kernels, and examples

  • Define compiler development priorities and plan functionalities

  • Grow the team: hire, mentor, and set ownership boundaries

Show more details

Senior Engineer – Backend (Physical Design & Timing)

Boost speed and energy efficiency by 100x for embedded chips using in-memory computing technology that eliminates data bottlenecks in AI-driven applications.

Experience Requirements:

  • 5+ years in ASIC physical design with a strong emphasis on timing closure and sign-off

  • Familiarity with STA tools and flows

  • Hands-on experience working with synthesis and place-and-route

  • Scripting ability to automate timing analysis and reporting

Other Requirements:

  • A collaborative approach with front-end, backend, and verification teams

Responsibilities:

  • Build, refine, and maintain timing constraints for blocks and top-level designs

  • Run STA across all relevant corners and modes to close setup and hold

  • Guide clock-tree strategy and debugging (skew, jitter, latency)

  • Lead timing and functional ECOs and track impacts

  • Automate timing checks, report generation, and regressions using scripting

Show more details

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