Blumind is a Canadian deep-tech startup developing all-analog AI neural network architecture for efficient power consumption without compromise. Their AMPL™ technology delivers high-performance inferencing with up to 1000x lower power than digital approaches and ultra-low latency. Applications include always-on audio and video inferencing, keyword detection, voice UI, time series data classification, visual wake word, and image classification. Their products include ultra-low power devices (BM110 and BM210), AMPL™ IP/chiplets, and software solutions for rapid deployment. Blumind targets various industries such as wearables, connected home, industrial, agriculture, medical, security & safety, smart mobility, and mil-aero.
• cost-effective solutions
• low latency
• easy-to-use
• high-performance
• standard cmos processes
• low-power
• lowest system power
• all-analog compute
Digital ASIC Design Engineer
Blumind offers all-analog AI solutions with ultra-low power, low latency, and cost-effective designs for various applications.
Education Requirements:
BSEE or MSEE focused on Digital IC design
Experience Requirements:
7+ years and have completed at least 1 complete product design cycle
Prior techincal leadership and start-up work experience is a plus
Other Requirements:
Expert Verilog, SystemVerilog, Perl, TCL and Python skills
RTL design and verification at chip level and block level
Experience working on mixed-signal ASIC developments with knowledge of how to interface with and verify mixed-signal blocks
Low power design techniques such as clock gating, power islands etc.
Experience with industry standard RTL simulation, lint, debug, synthesis, DFT/ATPG and static timing closure tools
Evaluation and integration of 3rd party IP such as microcontrollers, IOs etc.
Understanding of compute and AI processing architectures is preferred
Customer support and/or silicon bring-up
Responsibilities:
creating the novel Blumind machine learning inference engine and transforming Edge AI
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