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Femtosense

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About

Femtosense provides an embedded AI platform built on a unique AI accelerator. It offers higher performance at lower latency and reduced energy consumption, all within a smaller silicon footprint. Their technology is based on neuromorphic concepts of sparsity and locality, resulting in 100x energy efficiency and 10x model capacity improvements. The platform includes pre-trained and pre-optimized AI models, an SDK for custom application creation, and the Sparse Processing Unit (SPU) AI accelerator. Applications range from wearables and home appliances to robotics and autonomous vehicles.

Platform
Web
Keywords
platformaiembeddingsacceleratorsparse ai models
Task
ai acceleration

Features

ai accelerator

software development kit (sdk)

embedded ai platform

sparse ai models

ready-to-deploy models

sparsity-aware silicon

Job Opportunities

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Femtosense

Deep Learning Compiler Engineer

Femtosense's embedded AI platform delivers high-performance, low-latency AI with 100x energy efficiency and 10x model capacity.

engineeringhybridSF Bay Area, USfull-time

Education Requirements:

  • BS

  • MS

  • PhD in Computer Science, Electrical Engineering, or a related field

Experience Requirements:

  • 2+ years of experience or equivalent experience in a related PhD or MS program

Other Requirements:

  • Strong experience in C++ and Python development, with a focus on compiler or systems programming

  • Solid understanding of compiler design, optimization passes, and low-level hardware constraints

  • Familiarity with Mixed-Integer Linear Programming

  • Hands-on experience with MLIR or other intermediate representations (e.g., TVM or LLVM)

Responsibilities:

  • Develop and optimize compiler passes, including graph partitioning, memory allocation, and other critical performance enhancements

  • Work at the intersection of software and hardware to ensure seamless translation of deep learning models into efficient, low-level code in a custom ISA

  • Collaborate closely with the hardware and algorithm teams to support unique features and capabilities of our AI accelerators

  • Design and implement custom MLIR dialects tailored for our Sparse Processing Unit (SPU)

  • Explore advanced optimization techniques for complex scheduling and resource allocation problems

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