Bronco AI
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About
Bronco AI is an advanced design verification (DV) platform engineered to address the growing complexity and compressed timelines of modern chip development. As semiconductor designs become more intricate, the risk of silicon failure increases, making the verification process a critical bottleneck. Bronco AI provides automated assistance for DV teams, identifying bugs at high speeds and assisting engineers from initial failure detection to the final fix. It integrates directly into existing electronic design automation (EDA) workflows, allowing engineering teams to deploy it without significant upfront customization or disruption to their established processes. The platform provides a suite of tools designed to cover the entire verification lifecycle, from specification to sign-off. Its core capabilities include automated simulation debugging, which can process waveforms exceeding 100GB to provide analysis before an engineer begins their work. Additionally, it accelerates the bring-up of Universal Verification Methodology (UVM) collateral, such as novel stimulus and checkers, using specialized DV agents. For the planning phase, Bronco AI can analyze specifications and codebases to generate verification plans, reducing the time spent on manual documentation and ensuring thorough coverage of corner cases. Targeted primarily at chip design teams, silicon engineers, and verification leads, Bronco AI is built for those working on leading-node chips where first-time silicon success is important. It is used by organizations that need to clear verification backlogs or those facing tight market windows. The platform is designed for immediate application to current projects. By automating repetitive and time-consuming aspects of the DV process, it allows human engineers to focus on higher-level architectural challenges and complex debugging tasks that require deep domain expertise. Bronco AI offers specific features for security and continuous improvement within the semiconductor industry. It provides on-premise and "Bring Your Own AI" (BYOC) deployment options, ensuring that proprietary chip designs and intellectual property remain within controlled environments. Furthermore, the platform features self-improving AI that utilizes active learning to transfer knowledge across different tasks and projects. This learning process is designed to respect data compartmentalization, aiming to increase effectiveness over time without compromising the isolation of sensitive data across different design projects.
Pros & Cons
Automates debugging for waveforms larger than 100GB
Speeds up UVM collateral bring-up by up to 10x
Integrates seamlessly with existing standard EDA flows
Provides secure on-premise and BYOC deployment options
Generates verification plans directly from specs and codebases
Pricing is not transparent and requires a demo request
Requires specialized knowledge of chip design to operate
Focused exclusively on chip verification rather than general software
No self-service trial mentioned on the website
Use Cases
Silicon Engineers can use the automated failure-to-fix feature to analyze massive waveforms overnight, allowing them to start their day with identified bugs.
Verification Leads can automate the creation of verification plans from complex specs, saving weeks of manual labor and ensuring better coverage for tape-out.
Design Verification Teams can utilize specialized agents to bring up UVM testbenches and checkers 10x faster than traditional manual methods.
Security-conscious hardware companies can deploy the platform on-premise to leverage AI capabilities while keeping proprietary chip designs entirely within their private network.
Platform
Features
• on-prem deployment
• eda flow integration
• byoc security options
• verification planning
• uvm collateral generation
• testbench bring-up
• automated failure-to-fix
• simulation debugging
FAQs
What types of designs can Bronco AI verify?
Bronco AI is purpose-built for modern, complex chip designs, including those at the leading-node. It is designed to handle sprawling specifications and large-scale codebases, providing support from initial spec to final sign-off.
Does Bronco AI integrate with my current workflow?
Yes, the platform is designed for easy integration with standard EDA (Electronic Design Automation) flows. It is intended to be ready on day one, meaning it can be deployed on active projects without requiring extensive upfront customization.
How does the platform handle large data files like waveforms?
The platform includes an automated Failure-to-Fix feature that can analyze simulation waveforms exceeding 100GB. This allows the AI to process massive amounts of data and identify bugs before engineers even start their work shift.
What security options are available for sensitive chip data?
Bronco AI offers flexible deployment models to protect intellectual property, including on-premise installations and "Bring Your Own AI" (BYOC) options. These configurations ensure that design data remains within the company's secure environment.
How does the AI improve over time?
The platform uses active learning to create self-improving AI that transfers insights across different tasks, bugs, and projects. This learning process is designed to respect data compartmentalization, ensuring sensitive information is not leaked between projects.
Pricing Plans
Enterprise
Unknown Price• Simulation Debugging
• Testbench Bring-Up
• Verification Planning
• On-Premise Deployment
• BYOC AI Options
• EDA Flow Integration
• Self-Improving AI
• Active Learning
Job Opportunities
Founding ML Research Engineer
Streamline chip tape-out by automating design verification through AI-driven simulation debugging, testbench bring-up, and automated verification planning.
Benefits:
Competitive salary and equity package
Comprehensive benefits including health, vision, and dental coverage
High-ownership, high-velocity environment
Rapid learning opportunities
Work on accelerating the future of technology development
Education Requirements:
Bachelor's degree in Computer Science, Software Engineering, or related field
Advanced degree preferred
Experience Requirements:
Exceptional researcher who has designed large-scale ML systems
Experience building LLM applications and agentic LLM systems
Strong proficiency in Python and AI/ML frameworks like PyTorch
Familiarity with cloud computing platforms and distributed systems
Experience as an ML researcher/engineer with exposure to chip development
Other Requirements:
Strong intuition about computer architecture
Strong communication abilities
Background or experience with Electrical or Computer Engineering preferred
Familiarity with chip design and verification processes preferred
Experience with EDA tools (Synopsys, Vivado, etc.) preferred
Publications at leading ML or EDA conferences preferred
Responsibilities:
Design and implement core components of AI-powered engineering systems
Integrate classical algorithms and deep learning-based approaches across modalities
Utilize GPU clusters for efficient training, finetuning, and inference
Explore and implement efficient inference techniques to reduce costs
Stay ahead of the curve in AI research, particularly in LLMs
Show more details
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