Education Requirements:

• BS, MS, or PhD in EE/CS or related field (or equivalent experience)

Experience Requirements:

• 12+ overall years of relevant experience

• 5 yrs of managing systems/platform software teams, ideally in server RAS, firmware, telemetry, or data center solutions

Other Requirements:

• Strong knowledge of DMTF/PLDM for OOB telemetry collection, time series databases (e.g., InfluxDB, Prometheus) and REST APIs (Redfish)

• Deep understanding of Server and firmware architecture and optimization for low-latency APIs

• Proven track record of delivering scalable server products and telemetry solutions

• Experience with SCM (Git, Perforce) and project management tools (Jira)

• Excellent written and oral communication skills, strong work ethic, and commitment to teamwork

• Hands-on experience with x86/ARM system architecture and coding (C/C++, Python)

• Familiarity with Confidential Compute and notification systems

• Demonstrated ability to analyze algorithms for time/space complexity and system resource requirements

• You are a self-starter who loves to find creative solutions to complicated problems and hands on with coding

• Experience building and scaling telemetry collection and analysis engines

• Active contributor to Open Compute (OCP) and DMTF in relevant areas

• Proven leadership in delivering innovative platform telemetry solutions for large-scale AI infrastructure

Responsibilities:

• Lead Data Center Compute Telemetry & RAS: Own the end-to-end architecture and delivery for telemetry solutions, including fleet health monitoring, fault remediation, and data visualization at scale. Owning OOB telemetry solution and data validation for telemetry from each underlying device

• Build and Mentor a World-Class Team: Recruit, develop, and motivate a high-performing engineering team focused on platform telemetry, RAS and observability

• Process Optimization: Continuously improve software development processes for optimal productivity and quality

• Cross-Functional Collaboration: Work across teams to ensure seamless integration of telemetry solutions with platform firmware, server architecture, and data center management

• Product Ownership: Drive product life cycles with QA teams, ensuring robust testing, productization, and delivery

Education Requirements:

• MS in Electrical or Computer Engineering (or equivalent experience)

Experience Requirements:

• Minimum 5 years experience in Physical Design Engineering

Other Requirements:

• Familiar with aspects of chip design including Floor planning, Clock and Power distribution, Place and Route, Integration and Verification

• Strong background with hierarchical design approach, top-down design, budgeting, timing and physical convergence

• Familiar with various process related design issues including Design for Yield and Manufacturability, EM and IR closure and thermal management

• You'll need to have expertise and in-depth knowledge of industry standard EDA tools

• Proficiency in programming and scripting languages, such as, Perl, Python, and C++

Responsibilities:

• Developing physical design methodologies for implementation of graphics processors and SOCs

• Key responsibility includes developing unique and creative solutions to the state of the art physical design problems that are needed for NVIDIA chips

• Participate in developing flow and tool methodologies for chip floorplan, power and clock distribution, chip assembly and P&R, timing analysis and closure, power and noise analysis and back-end verification across multiple projects

Education Requirements:

• BSc or MSc or equivalent experience in electrical engineering

Other Requirements:

• Deep understanding of how to build and integrate systems with various technology components

• Knowledge and understanding of computing and networking systems

• A can-do attitude and high energy with leadership and excellent interpersonal skills and possess the ability to learn complex concepts in a fast pace environment

• Utmost passion for attention to details in design and a high focus on design quality

• Experience and love for system architecture, CPU/GPU/Memory/Storage/Networking

Responsibilities:

• Define the Network Adapter chip architecture end to end from the market requirements through design and all product life cycles (post/pre-silicon, on deployments). Work with related industry standards & customers on deploying your tech

• Collaborate with teams across teams (physical design, logic design, system software, firmware, applications)

• Work on proof of concepts and advance development projects

• Perform research and analysis for current and future architectures

• Craft product design specifications